发明名称 Semiconductor device
摘要 According to one embodiment, the semiconductor device with element isolation by DTI has a layer of the first electroconductive type formed on a substrate. The semiconductor layer of the second electroconductive type is formed on the embedding layer. The first DTI has the following structure: a trench is formed from the surface of the semiconductor layer through the first layer into the substrate and surrounds the semiconductor layer, and an insulator is formed in the trench. The second DTI is formed around the periphery of the semiconductor layer. The first electrode is connected to the first region of the semiconductor layer divided by the first DTI. The second electrode is connected to the second region of the semiconductor layer divided as mentioned previously. The first region and the second region form electrode plates and the first DTI forms the dielectric, to thereby form a capacitor.
申请公布号 US8921973(B2) 申请公布日期 2014.12.30
申请号 US201313779631 申请日期 2013.02.27
申请人 Kabushiki Kaisha Toshiba 发明人 Hirayu Tsuyoshi
分类号 H01L29/94;H01L21/762;H01L29/06 主分类号 H01L29/94
代理机构 Patterson & Sheridan LLP 代理人 Patterson & Sheridan LLP
主权项 1. A semiconductor device comprising: a first layer of a first dopant type; a second layer of the first dopant type on the first layer; a third layer of a second dopant type overlying the second layer; a first closed loop trench including a dielectric material therein and extending at least through the third layer and into the second layer, and surrounding a first region of the second and third layers; a first electrode connected to the first region of the third layer; and a second electrode connected to a second region of the third layer around the first closed loop trench.
地址 Tokyo JP