发明名称 Display device
摘要 A display device includes a driving circuit that applies an active potential which is a potential for turning on pixel transistors sequentially to a plurality of output signal lines, wherein the driving circuit includes a main driving circuit that outputs the active potential to one end of the output signal line of the plurality of output signal lines by applying a clock signal caused by a input of the active potential output from the upper output signal line, and an auxiliary driving circuit that has an auxiliary transistor which is a transistor where the other end of the output signal line is connected to a signal line for the clock signal via the source or the drain. Thereby, output waveform distortion in the scanning signal line can be improved and thus display quality can be enhanced.
申请公布号 US8912992(B2) 申请公布日期 2014.12.16
申请号 US201213437038 申请日期 2012.04.02
申请人 Japan Display Inc. 发明人 Ochiai Takahiro;Goto Mitsuru;Higashijima Hiroyuki;Miyamoto Motoharu
分类号 G09G3/36 主分类号 G09G3/36
代理机构 Antonelli, Terry, Stout & Kraus, LLP. 代理人 Antonelli, Terry, Stout & Kraus, LLP.
主权项 1. A display device comprising a driving circuit configured to sequentially apply an active potential, which comprises a potential for turning on pixel transistors of the display device, to a plurality of output signal lines extending from an upper output signal line to a lower output signal line, wherein the driving circuit includes a main driving circuit configured to output the active potential to one end of one of the output signal lines of the plurality of output signal lines by applying a first clock signal caused by an input of the active potential output from the upper output signal line; and an auxiliary driving circuit that includes an auxiliary transistor comprising a transistor in which one of a source and a drain is connected to the other end of said one output signal line, and the other of said source and drain is connected to a signal line for said first clock signal, wherein the main driving circuit includes a main transistor that is switched so as to apply the first clock signal to the output signal line, and a gate of the auxiliary transistor is connected to a gate line of the main transistor for the upper output signal line.
地址 Tokyo JP