发明名称 CONTROL CIRCUIT AND CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To secure memory data while reducing power consumption by memory refresh.SOLUTION: According to one embodiment, a control circuit includes: a storage unit storing therein state information showing a first value that indicates that memory refresh is performed or a second value that indicates that memory refresh is inhibited; and a control unit performing memory refresh and updating the state information to the second value if the state information shows the first value, and inhibiting memory refresh and updating the state information to the first value if the state information shows the second value. The control unit updates the state information to the second value if a memory is accessed.</p>
申请公布号 JP2014235770(A) 申请公布日期 2014.12.15
申请号 JP20130118643 申请日期 2013.06.05
申请人 RENESAS ELECTRONICS CORP 发明人 NAKATSUKA HIROYASU
分类号 G11C11/406 主分类号 G11C11/406
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