发明名称 DEVICE INCLUDING A TRANSISTOR HAVING A STRESSED CHANNEL REGION AND METHOD FOR THE FORMATION THEREOF
摘要 A device includes a substrate, a P-channel transistor and an N-channel transistor. The substrate includes a first layer of a first semiconductor material and a second layer of a second semiconductor material. The first and second semiconductor materials have different crystal lattice constants. The P-channel transistor includes a channel region having a compressive stress in a first portion of the substrate. The channel region of the P-channel transistor includes a portion of the first layer of the first semiconductor material and a portion of the second layer of the second semiconductor material. The N-channel transistor includes a channel region having a tensile stress formed in a second portion of the substrate. The channel region of the N-channel transistor includes a portion of the first layer of the first semiconductor material and a portion of the second layer of the second semiconductor material. Methods of forming the device are also disclosed.
申请公布号 US2014361335(A1) 申请公布日期 2014.12.11
申请号 US201313914288 申请日期 2013.06.10
申请人 GLOBALFOUNDRIES INC. 发明人 Flachowsky Stefan;Illgen Ralf;Zschaezsch Gerd
分类号 H01L27/092;H01L21/8238 主分类号 H01L27/092
代理机构 代理人
主权项 1. A device, comprising: a substrate, said substrate comprising a first layer of a first semiconductor material and a second layer of a second semiconductor material, wherein said second layer is provided on said first layer, and said first and second semiconductor materials have different crystal lattice constants; a P-channel transistor comprising a channel region having a compressive stress provided in a first portion of said substrate, said channel region of said P-channel transistor comprising a portion of said first layer of said first semiconductor material and a portion of said second layer of said second semiconductor material; and an N-channel transistor comprising a channel region having a tensile stress formed in a second portion of said substrate, said channel region of said N-channel transistor comprising a portion of said first layer of said first semiconductor material and a portion of said second layer of said second semiconductor material.
地址 Grand Cayman KY