| 发明名称 |
SYNAPSE ARRAY, PULSE SHAPER CIRCUIT AND NEUROMORPHIC SYSTEM |
| 摘要 |
A synapse array based on a static random access memory (SRAM), a pulse shaper circuit, and a neuromorphic system are provided. The synapse array includes a plurality of synapse circuits. At least one synapse circuit among the plurality of synapse circuits includes at least one bias transistor and at least two cut-off transistors, and the at least one synapse circuit is configured to charge a membrane node of a neuron circuit connected with the at least one synapse circuit using a sub-threshold leakage current that passed through the at least one bias transistor. |
| 申请公布号 |
US2014365416(A1) |
申请公布日期 |
2014.12.11 |
| 申请号 |
US201414165392 |
申请日期 |
2014.01.27 |
| 申请人 |
POSTECH ACADEMY-INDUSTRY FOUNDATION ;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM Jun Seok;SIM Jae Yoon;RYU Hyun Surk;CHO Hwasuk |
| 分类号 |
G06N3/063;G06N3/08 |
主分类号 |
G06N3/063 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A synapse array based on a static random access memory (SRAM), the synapse array comprising a plurality of synapse circuits,
wherein at least one synapse circuit among the plurality of synapse circuits comprises at least one bias transistor and at least two cut-off transistors, and the at least one synapse circuit is configured to charge a membrane node of a neuron circuit connected with the at least one synapse circuit using a sub-threshold leakage current that passed through the at least one bias transistor. |
| 地址 |
Pohang-si KR |
