发明名称 METHOD FOR ANALYZING CMOS DYNAMIC POWER DISSIPATION USING TEMPORAL PARALLEL SIMULATION
摘要 <p>The present invention relates to a method for rapidly and accurately predicting dynamic power consumption through a simulation. Switching frequency information required for predicting dynamic power consumption is collected in parallel when at least two simulators are independently performed in parallel through a temporal parallel simulation.</p>
申请公布号 KR20140141950(A) 申请公布日期 2014.12.11
申请号 KR20130063358 申请日期 2013.06.03
申请人 YANG, SEI YANG 发明人 YANG, SEI YANG
分类号 G01R22/06;G01R21/00;G01R22/00 主分类号 G01R22/06
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