发明名称 Semiconductor device and data output circuit therefor
摘要 A semiconductor device includes a memory cell array configured to include a plurality of memory cells connected between a plurality of bit lines and a plurality of word lines, a bit line sense amplifier connected to a bit line of the bit lines and configured to amplify data stored in a selected memory cell and transfer the amplified data to a segment I/O line, a control signal generator configured to determine a level of an I/O switch control signal in response to a level of a power source voltage, and a local sense amplifier connected between the segment I/O line and an local I/O line and configured to couple or separate the segment I/O line and the local I/O line in response to the I/O switch control signal, amplify the data transferred to the segment I/O line, and supply the amplified data to the local I/O line.
申请公布号 US8908447(B2) 申请公布日期 2014.12.09
申请号 US201213720612 申请日期 2012.12.19
申请人 SK Hynix Inc. 发明人 Lee Sang Ho
分类号 G11C7/06;G11C7/10;G11C11/4091;G11C11/4097 主分类号 G11C7/06
代理机构 William Park & Associates Patent Ltd. 代理人 William Park & Associates Patent Ltd.
主权项 1. A semiconductor device, comprising: a memory cell array configured to comprise a plurality of memory cells connected between a plurality of bit lines and a plurality of word lines; a bit line sense amplifier (BLSA) connected to a bit line of the bit lines and configured to amplify data stored in a selected memory cell and transfer the amplified data to a segment input/output (I/O) line; a control signal generator configured to output an I/O switch control signal in response to a pre-switching control signal and a level detection signal determined by a level of a power source voltage; and a local sense amplifier (LSA) connected between the segment I/O line and an local I/O line and configured to couple or separate the segment I/O line and the local I/O line in response to the I/O switch control signal, amplify the data transferred to the segment I/O line, and supply the amplified data to the local I/O line, wherein the pre-switching control signal is configured to have a predetermined level when a read operation is performed, and the control signal generator is configured to output the I/O switch control signal regardless of a level of the pre-switching control signal.
地址 Gyeonggi-do KR