发明名称 Semiconductor memory device including stacked sub memory cells
摘要 A semiconductor memory device which includes a memory cell including two or more sub memory cells is provided. The sub memory cells each including a word line, a bit line, a first capacitor, a second capacitor, and a transistor. In the semiconductor device, the sub memory cells are stacked in the memory cell; a first gate and a second gate are formed with a semiconductor film provided therebetween in the transistor; the first gate and the second gate are connected to the word line; one of a source and a drain of the transistor is connected to the bit line; the other of the source and the drain of the transistor is connected to the first capacitor and the second capacitor; and the first gate and the second gate of the transistor in each sub memory cell overlap with each other and are connected to each other.
申请公布号 US8907392(B2) 申请公布日期 2014.12.09
申请号 US201213718426 申请日期 2012.12.18
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei;Koyama Jun
分类号 H01L27/108 主分类号 H01L27/108
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor memory device comprising a memory cell including two or more sub memory cells, the sub memory cells each including: a word line; a bit line; a first capacitor; a second capacitor; and a transistor, wherein the sub memory cells are stacked in the memory cell, wherein the transistor comprises a first gate, a second gate and a semiconductor film between the first gate and the second gate, wherein the first gate and the second gate are electrically connected to the word line, wherein one of a source and a drain of the transistor is electrically connected to the bit line, wherein the other of the source and the drain of the transistor is electrically connected to the first capacitor and the second capacitor, and wherein the first gate and the second gate of the transistor overlap with each other and are electrically connected to each other.
地址 Atsugi-shi, Kanagawa-ken JP