发明名称 Method and apparatus for adjusting power consumption level of an integrated circuit
摘要 Briefly, a method and apparatus adjusts the power consumption level of an integrated circuit by dynamically scaling the clock frequency based on the real-time determined power consumption level. In one example, the method and apparatus changes an actual clock frequency of the integrated circuit to an effective clock frequency based on the maximum clock frequency and the difference between the threshold power consumption level and the actual power consumption level of the integrated circuit in the previous sampling interval. In one example, an effective clock frequency of the integrated circuit in the current sampling interval is determined. In one example, the difference between the maximum and effective clock frequencies in the current sampling interval is proportional to the difference between the threshold and actual power consumption levels in the previous sampling interval. The actual clock frequency of the integrated circuit is changed to the determined effective clock frequency.
申请公布号 US8909961(B2) 申请公布日期 2014.12.09
申请号 US201113305868 申请日期 2011.11.29
申请人 ATI Technologies ULC;Advanced Micro Devices, Inc. 发明人 Herman Jeffrey;Sitaraman Krishna;Huang Jia An;Presant Stephen D.;Ibrahim Ali;Dwarakanath Ashwini
分类号 G06F1/00;G06F1/32 主分类号 G06F1/00
代理机构 Faegre Baker Daniels LLP 代理人 Faegre Baker Daniels LLP
主权项 1. A method for adjusting power consumption level of an integrated circuit comprising: changing an actual clock frequency of the integrated circuit to an effective clock frequency based on a maximum clock frequency of the integrated circuit and a difference between a threshold power consumption level and an actual power consumption level of the integrated circuit in a previous sampling interval.
地址 Markham, Ontario CA