发明名称 Configuring a programmable logic device using a configuration bit stream without phantom bits
摘要 Techniques and mechanisms generate a configuration bit stream to load into a circuit such as a Programmable Logic Device (PLD). A configuration bit stream may have a reduced size if “phantom bits” not corresponding to configuration elements are removed. However, the PLD may need a full-sized and properly ordered configuration bit stream in order to be properly configured. Techniques and mechanisms are described for selectively adding a “padding bit” to compensate for the missing phantom bits.
申请公布号 US8910102(B2) 申请公布日期 2014.12.09
申请号 US201313781350 申请日期 2013.02.28
申请人 Altera Corporation 发明人 Choe Kok Heng
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Weaver Austin Villeneuve & Sampson LLP 代理人 Weaver Austin Villeneuve & Sampson LLP
主权项 1. A method for configuring a configurable circuit, the method comprising: receiving, by the configurable circuit, a first configuration bit stream; and generating, by the configurable circuit, a second configuration bit stream, the second configuration bit stream including at least one padding bit and at least one bit from the received first configuration bit stream, wherein the at least one padding bit corresponds to a location in the configurable circuit without a corresponding configuration element, and wherein the at least one padding bit is included based on information of a design of the configurable circuit, the information of the design of the configurable circuit indicating a distribution of resources types in the configurable circuit.
地址 San Jose CA US