| 摘要 |
The subject of the invention is a circuit (601) for verifying the temporal running of the execution of at least one task by an execution unit (600) operating in tempo with a synchronization signal and independent of said circuit, the normal execution of the at least one task being described by an execution graph comprising nodes representing the states of execution of the task and transition arcs. The verifying circuit comprises a mechanism for maintaining a time base Te up to date, serving as reference for the temporal verification, said signal being representative of the tempo of the synchronization signal, the circuit furthermore comprising a mechanism verifying that the path through the graph resulting from the execution of at least one task is valid, an error message being generated if such is not the case. |
