发明名称 SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a CMOS SRAM having a microscopic SOI structure.SOLUTION: A memory cell of a CMOS SRAM formed on a semiconductor substrate 1 via an insulation film 2 comprises: a flip flop for holding of information, composed of two pairs of a P-channel MISFET which has a gate electrode 19 integrally enclosing a part 6a of a lower semiconductor layer and a part 6b of an upper semiconductor layer of a dual semiconductor layer part via a gate insulation film 17 and in which ptype source-drain regions (9, 10) are formed in a semiconductor layer 5 in combination with an N-channel MISFET in which n type and ntype source-drain regions (24-27) are formed in a semiconductor layer 15; and a word transistor for reading or writing composed of two N-channel MISFETs each of which has a gate electrode 20 enclosing a part 16 of a single layer semiconductor layer via a gate insulation film 18 and in each of which n type and ntype source-drain regions (24-27) are formed in a semiconductor layer 14.</p>
申请公布号 JP2014225490(A) 申请公布日期 2014.12.04
申请号 JP20130102757 申请日期 2013.05.15
申请人 SHIRADO TAKEHIDE 发明人 SHIRATO TAKEHIDE
分类号 H01L21/8238;H01L21/8244;H01L27/08;H01L27/092;H01L27/10;H01L27/11;H01L29/786 主分类号 H01L21/8238
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