MEMORY CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

摘要

A memory chip includes a data processing block suitable for serial-parallel converting data inputted and for parallel-serial converting data to be outputted, a write data transmitting unit suitable for transmitting the data serial-parallel converted by the data processing block to a write data interlayer channel, a write data receiving unit suitable for receiving data from the write data interlayer channel, the data to be written to a core area, a read data receiving unit suitable for receiving data from a read data interlayer channel, the data to be parallel-serial converted by the data processing block, and a read data transmitting unit suitable for transmitting data read from the core area to the read data interlayer channel.

主权项

1. A memory chip comprising:
a data processing block suitable for serial-parallel converting data inputted and for parallel-serial converting data to be outputted; a write data transmitting unit suitable for transmitting the data serial-parallel converted by the data processing block to a write data interlayer channel; a write data receiving unit suitable for receiving data from the write data interlayer channel, the data to be written to a core area; a read data receiving unit suitable for receiving data from a read data interlayer channel, the data to be parallel-serial converted by the data processing block; and a read data transmitting unit suitable for transmitting data read from the core area to the read data interlayer channel, wherein enablement of the data processing block, the write data transmitting unit, and the read data receiving unit depends on whether the memory chip is set as master or slave.