| 摘要 |
<p>Provided is multi-threshold voltage (Vt) field effect transistors (FETs) formed by deformation engineering. According to an embodiment of the present invention, an integrated circuit device comprises: a first transistor including a first channel region on a first buffer; and a second transistor including a second channel region on a second buffer, wherein the first channel region is made from III-V semiconductor materials, the second channel region is made from III-V semiconductor materials, and the first and second buffers have lattice mismatch. A first deformation induced by the lattice mismatch between the III-V semiconductor materials and the first buffer is different from a second deformation induced by the lattice mismatch between the III-V semiconductor materials and the second buffer. Therefore, the threshold voltage of the first transistor is difference from the threshold voltage of the second transistor.</p> |
