Display device and electronic device including the same

摘要

It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

主权项

1. A display device comprising:
a driver circuit; and a pixel, wherein the driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a capacitor, wherein a first terminal of the first transistor is electrically connected to a first wiring and a second terminal of the first transistor is electrically connected to a second wiring, wherein a first terminal of the second transistor is electrically connected to the second wiring and a second terminal of the second transistor is electrically connected to a gate of the first transistor, and a gate of the second transistor is electrically connected to the first wiring, wherein a first terminal of the third transistor is electrically connected to a third wiring and a second terminal of the third transistor is electrically connected to the gate of the first transistor, wherein a first terminal of the fourth transistor is electrically connected to the third wiring, a second terminal of the fourth transistor is electrically connected to a gate of the third transistor, and a gate of the fourth transistor is electrically connected to the gate of the first transistor, wherein one electrode of the capacitor is electrically connected to the first wiring and the other electrode of the capacitor is electrically connected to the gate of the third transistor, and wherein each semiconductor layer of the first to fourth transistors includes an oxide semiconductor layer.