| 发明名称 | Semiconductor device design method, system and computer-readable medium | ||
| 摘要 | A semiconductor device design system comprising at least one processor is configured to define a resistance-capacitance (RC) extraction tool for determining a distance between first and second through-semiconductor-vias extracted from a layout of a semiconductor device. The semiconductor device has a semiconductor substrate and the first and second through-semiconductor-vias in the semiconductor substrate. The semiconductor device design system comprising the at least one processor is also configured to extract parasitic parameters of a coupling in the semiconductor substrate based on the distance determined by the RC extraction tool and a model of the coupling included in a simulation tool. | ||
| 申请公布号 | US8904337(B2) | 申请公布日期 | 2014.12.02 |
| 申请号 | US201414200714 | 申请日期 | 2014.03.07 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Yang Ching-Shun;Wu Ze-Ming;Chao Hsiao-Chu;Cheng Yi-Kan |
| 分类号 | G06F11/22;G06F17/50;G03F7/00 | 主分类号 | G06F11/22 |
| 代理机构 | Lowe Hauptman & Ham, LLP | 代理人 | Lowe Hauptman & Ham, LLP |
| 主权项 | 1. A semiconductor device design system, comprising at least one processor configured to: define a resistance-capacitance (RC) extraction tool for determining a distance between first and second through-semiconductor-vias extracted from a layout of a semiconductor device, said semiconductor device having a semiconductor substrate and the first and second through-semiconductor-vias in the semiconductor substrate; and extract parasitic parameters of a coupling in the semiconductor substrate based on the distance determined by the RC extraction tool and a model of the coupling included in a simulation tool. | ||
| 地址 | TW | ||