Memory devices and operating methods for a memory device

摘要

Devices and methods facilitate memory device operation in all bit line architecture memory devices. In at least one embodiment, memory cells comprising alternating rows are concurrently programmed by row and concurrently sensed by row at a first density whereas memory cells comprising different alternating rows are concurrently programmed by row and concurrently sensed by row at a second density. In at least one additional embodiment, memory cells comprising alternating tiers of memory cells are programmed and sensed by tier at a first density and memory cells comprising different alternating tiers of memory cells are programmed and sensed by tier at a second density.

主权项

1. A method of operating a memory device having an array of memory cells logically arranged in tiers and in columns where each column is coupled to a respective one of a plurality of data lines and where each tier comprises a plurality of rows of memory cells, the method comprising:
concurrently programming a selected memory cell of each row of memory cells comprising a first tier of memory cells at a first density; and concurrently programming a selected memory cell of each row of memory cells comprising a second tier of memory cells at a second density different than the first density.