发明名称 INJECTION LOCK ALL DIGITAL FREQUENCY SYNTHESIZER CIRCUIT
摘要 The present invention relates to a technology which divides a frequency synthesizer circuit into a frequency synthesizer circuit unit and an injection locking phase locked loop circuit but, and implement rapid frequency and phase locking by sequentially a frequency synthesizer locking operation and an injection locking operation. An injection locking digital frequency synthesizer circuit includes: a frequency synthesizer to output a reset signal and a second reference clock signal by performing frequency and phase locking operation according to a first reference clock signal and point number information which is received from an outside; and an injection locking phase locked loop reset according to the reset signal input when the frequency synthesizer locks a frequency to start a frequency locking operation, divides the second reference clock signal into a desired frequency of an integer multiple as a reference clock to output a corresponding output clock signal.
申请公布号 KR101467547(B1) 申请公布日期 2014.12.01
申请号 KR20130103808 申请日期 2013.08.30
申请人 POSTECH ACADEMY-INDUSTRY FOUNDATION 发明人 SIM, JAE YOON;HONG, SEUNG HWAN
分类号 H03L7/18 主分类号 H03L7/18
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