Algorithm to identify best Q-gating candidates and a Q-gating cell architecture to satiate the launch-off-shift (LOS) testing

摘要

A processor-implemented method for selective Q-gating flip-flops in a plurality of flip-flops contained in a design is provided. The method may include determining a maximum width, a maximum depth, and a maximum congestion value in the design and determining a relative width, a relative depth, and a relative congestion value for each of the plurality of flip-flops in the design. The method may further include determining grade values for each of the plurality of flip-flops in the design based on a ratio between the relative width, the relative depth and the relative congestion value, and the maximum width, the maximum depth, and the maximum congestion value, respectively and determining an overall summed value for each of the plurality of flip-flops. Then the method may sort the plurality of flip-flops based on the overall summed value for the plurality of flip-flops according to magnitude.

主权项

1. A method for selective Q-gating flip-flops in a plurality of flip-flops contained in a design, the method comprising:
determining, by a processor, a maximum width value, a maximum depth value, and a maximum congestion value in the design; determining a relative width value, a relative depth value, and a relative congestion value for each of the plurality of flip-flops in the design; determining grade values for each of the plurality of flip-flops in the design based on a ratio between the relative width value, the relative depth value and the relative congestion value, and the maximum width value, the maximum depth value, and the maximum congestion value, respectively; determining, based on the grade values for each of the plurality of flip-flops in the design, an overall summed value for each of the plurality of flip-flops; and sorting the plurality of flip-flops based on the overall summed value for the plurality of flip-flops according to magnitude.