发明名称 Gamma bus amplifier offset cancellation
摘要 The present disclosure generally relates to gamma bus wiring techniques that saves space in a display such as a liquid crystal display. In certain embodiments, a voltage offset associated with gamma bus amplifiers configured to provide analog voltage levels to a pixel may reduce at least some of the visual performance characteristics of the attached display when it transitions between different voltage values provided by different gamma bus amplifiers. The voltage offsets associated with the gamma bus amplifiers may be distributed between multiplexers that are coupled to gamma bus amplifiers by interlacing the wires routed from a resistor string to the multiplexers.
申请公布号 US8896513(B2) 申请公布日期 2014.11.25
申请号 US201213364045 申请日期 2012.02.01
申请人 Apple Inc. 发明人 Bi Yafei
分类号 G09G3/36 主分类号 G09G3/36
代理机构 Fletcher Yoder PC 代理人 Fletcher Yoder PC
主权项 1. A gamma adjustment circuitry, comprising: a resistor string configured to provide 2N voltage levels on 2N respective nodes that correspond to 2N respective gray levels to be displayed in an N-bit unit pixel of a display panel; a set of multiplexers, wherein each multiplexer in the set of multiplexers is coupled to a respective subset of the 2N respective nodes, wherein a plurality of adjacent nodes that correspond to a respective plurality of adjacent gray levels in two respective subsets of the 2N respective nodes is interlaced between two respective multiplexers in the set of multiplexers; a set of amplifiers, wherein each amplifier in the set of amplifiers is coupled to a respective multiplexer in the set of multiplexers; and a source driver coupled to the set of amplifiers, wherein the source driver supplies a voltage that corresponds to one of the 2N voltage levels to the N-bit unit pixel.
地址 Cupertino CA US