发明名称 Physical topology-driven logical design flow
摘要 A design system provides data structures to store parameters of physical structures that can be viewed and modified through a graphical design interface. Certain of the structures of the physical system may be partitioned into a subsystem such that the data describing the subsystem includes physical topology data defining relative locations of the structures in the physical system. The physical topology data is back-annotated into a logical topology, such as in accordance with a predefined logical topology template. The logical data abstraction of the circuit design is kept synchronized with the physical data and presented in a logical topology that is kept legible through the prudent selection of logical topologies representing the physical subsystem design.
申请公布号 US8898039(B1) 申请公布日期 2014.11.25
申请号 US200912422941 申请日期 2009.04.13
申请人 Cadence Design Systems, Inc. 发明人 Kukal Taranjit Singh;Gupta Nikhil;Durrill Steve;Khanna Vikrant;Xiao Dingru
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Rosenberg, Klein & Lee 代理人 Rosenberg, Klein & Lee
主权项 1. An apparatus to design a physical system of components, the design of the physical system including modifiable design data that, when compliant with established design criteria, describe a realization of the physical system, the apparatus comprising: a database to store the design data defining physical structure of each of the components and defining a physical topology specifying a location in the physical system of each of the components, the database further to store a plurality of predefined topology templates, each defining a schematic topology specifying relative locations of graphical representations of the components in a schematic data abstraction of the design data; a user interface to accept design instructions from a user including a selection of a topology template from the predefined topology templates; and a processor executing to generate a logical topology by mapping the location of each component in the physical topology to a location of the graphical representation of the corresponding one of the components in the schematic topology, and rearranging one or more of the physical topology components according to the selected topology template; the processor further executing to store the mapped locations of each of the components in the design data; the logical topology defining an interconnection of the components, having a relative placement of components different from a relative placement of the components in the physical topology, and including a mixture of representations for the components in schematic and physical topology forms.
地址 San Jose CA US