发明名称 A SEMICONDUCTOR DEVICE INCLUDING A VERTICAL DECOUPLING CAPACITOR
摘要 <p>A vertical or three-dimensional non-planar configuration for a decoupling capacitor (240,340,440,540) is provided, which significantly reduces the required die area for capacitors of high charge carrier storage capacity. The non-planar configuration of the decoupling capacitors (240,340,440,540) also provides enhanced pattern uniformity during the highly critical gate patterning process.</p>
申请公布号 KR101464710(B1) 申请公布日期 2014.11.24
申请号 KR20087002577 申请日期 2006.05.23
申请人 发明人
分类号 H01L27/06 主分类号 H01L27/06
代理机构 代理人
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