Internal BUS bridge architecture and method in multi-processor systems

摘要

An internal bus bridge architecture and method is described. Embodiments include a system with multiple bus endpoints coupled to a bus root via a host bus bridge that is internal to at least one bus endpoint. In addition, the bus endpoints are directly coupled to each other. Embodiments are usable with known bus protocols.

主权项

1. A system comprising:
a bus root configurable to communicate with peripheral components via a bus; said bus root includes system memory and a central processing unit integral to said bus root; and a first peripheral component coupled directly to the bus root and further coupled directly to a second peripheral component, the first peripheral component comprising an internal bridge configurable to receive data and to transmit data, wherein receiving and transmitting comprises direct communication between the first peripheral component and the second peripheral component; wherein receiving and transmitting further comprise transmitting requests and data from the second peripheral component to the first peripheral component via the bus root.