Memory device from which dummy edge memory block is removed

摘要

A semiconductor memory device having an open bitline memory structure from which an edge dummy memory block is removed, the semiconductor memory device includes a memory block, an edge sense amplification block including a first sense amplifier having a first bitline, a first complementary bitline, and a first amplification circuit comprising a first transistor having a first size, a central sense amplification block including a second sense amplifier having a second bitline, a second complementary bitline, and a second amplification circuit comprising a second transistor having a second size different from the first size, a capacitor block electrically connected to the edge sense amplification block.

主权项

1. A semiconductor memory device having an open bitline memory structure, comprising:
an edge sense amplification block comprising a first sense amplifier connected to a first memory cell arrangement of an edge memory block, the first sense amplifier comprising a first equalization circuit connected to a first power signal; a central sense amplification block comprising a second sense amplifier connected to a second memory cell arrangement of the edge memory block, the second sense amplifier comprising a second equalization circuit connected to a second power signal; and a power generation device that generates the first power signal and the second power signal, wherein the first power signal is provided to the first equalization circuit through a different signal path than the second power signal is provided to the second equalization circuit.