发明名称 GRAPHICS PROCESSING SYSTEMS
摘要 <p>A tile-based graphic processing pipe line (1) includes a rasterizer (3), a renderer (6), a tile buffer (10), a write-out stage (13), and a programmable processing state (14). The tile buffer (10) stores a plurality of render targets for a delay shading operation. The programmable processing stage (14) reads data from at least two of a set of the plurality of render targets for the delay shading operation, which are stored in the tile buffer (10), under control of graphic program commands, performs a delay shading processing operation by using the read data, and record the result of the processing operation in an output render target in the tile buffer (10), or an external memory.</p>
申请公布号 KR20140131270(A) 申请公布日期 2014.11.12
申请号 KR20140050421 申请日期 2014.04.28
申请人 ARM LIMITED 发明人 NYSTAD JORN;ANDREAS DUE ENGH HALSTVEDT;SANDEEP KAKARLAPUDI;MICHAEL STOKES
分类号 G06T1/20 主分类号 G06T1/20
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