发明名称 Method of semiconductor integrated circuit fabrication
摘要 A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.
申请公布号 US8883403(B2) 申请公布日期 2014.11.11
申请号 US201213616802 申请日期 2012.09.14
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Chen Chun-Chang;Yang Shun-Shing;Wu Chuan-Ling;Mo Wang-Pen;Hsieh Hung-Chang
分类号 G03F7/26 主分类号 G03F7/26
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method for fabricating a semiconductor integrated circuit (IC), the method comprising: providing a substrate having a first area and a second area, wherein a top surface of the first area is in a different plane than a top surface of the second area; depositing a photosensitive step-forming-material (SFM) over the first and second areas; and removing the SFM from the second area, thereby forming a patterned photosensitive SFM in the first area; wherein the height difference between top surfaces of the first area and the second area is about 1500 Å to about 3500 Å.
地址 Hsin-Chu TW