发明名称 High performance input receiver circuit for reduced-swing inputs
摘要 An input buffer receiver circuit for electronic devices (e.g., memory chips) to receive reduced-swing and high bandwidth inputs to provide “buffered” output signals having symmetrical rising and falling delays, and without additional current dissipation over previous receiver circuits, is disclosed. The receiver circuit may include two differential amplifier pair stages (i.e., 4 total differential amplifiers). The first stage of differential amplifiers convert the single-ended input signal to a full-differential signal, which is converted back to a single-ended output signal by the second stage of differential amplifiers. The output of a P-diff first stage may be connected to the input of an N-diff second stage and the output of an N-diff first stage may be connected to the input of a P-diff second stage thereby creating a “cross coupled” structure. Various current saving and biasing methods may also be employed to keep operating current the same or lower than previous designs.
申请公布号 US8884690(B2) 申请公布日期 2014.11.11
申请号 US201213398041 申请日期 2012.02.16
申请人 Micron Technology, Inc. 发明人 Pan Dong;Cowles Timothy B.
分类号 G06G7/12;G11C7/10;H03F3/45 主分类号 G06G7/12
代理机构 Dorsey & Whitney LLP 代理人 Dorsey & Whitney LLP
主权项 1. A method of generating a combined output signal, comprising: converting a single-ended input signal into first and second differential signals using a first pair of differential amplifiers, wherein the second differential signal is isolated from the first differential signal and wherein the first and second differential signals are based, at least in part, on a same reference signal; applying the first and second differential signals to a second pair of differential amplifiers to generate first and second output signals including providing the first differential signal from a P-type differential amplifier to an N-type differential amplifier and providing the second differential signal from an N-type differential amplifier to a P-type differential amplifier, wherein each of the second pair of differential amplifiers is configured to swing between first and second supply voltages; and combining the first and second output signals to generate the combined output signal.
地址 Boise ID US