Margin Test Methods and Circuits

摘要

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

主权项

1. A receiver comprising:
a data input to receive a data signal; a first sampler having a first sampler input coupled to the data input, the first sampler to sample the data signal to produce a first sampled data stream representing first historical bits; a second sampler having a second sampler input coupled to the data input, the second sampler to sample the data signal to produce a second sampled data stream representing second historical bits; a data-weighting circuit coupled between the second sampler and the data input, the data-weighting circuit to apply a weighted sum of a plurality of the second historical bits to the first sampler input and to the second sampler input; and a comparison circuit to identify differences between the first sampled data stream and the second sampled data stream.