HETEROGENEOUS SOC IP CORE PLACEMENT IN AN INTERCONNECT TO OPTIMIZE LATENCY AND INTERCONNECT PERFORMANCE

摘要

Systems and methods described herein are directed to solutions for Network on Chip (NoC) interconnects that automatically and dynamically determines the position of hosts of various size and shape in a NoC topology based on the connectivity, bandwidth and latency requirements of the system traffic flows and certain performance optimization metrics such as system interconnect latency and interconnect cost. The example embodiments selects hosts for relocation consideration and determines a new possible position for them in the NoC based on the system traffic specification, shape and size of the hosts and by using probabilistic function to decide if the relocation is carried out or not. The procedure is repeated over new sets of hosts until certain optimization targets are satisfied or repetition count is exceeded.

主权项

1. A method, comprising:
determining positions for a plurality of hosts, a first one of the plurality of hosts having a different physical footprint from a second one of the plurality of hosts; and connecting a plurality of ports of the plurality of hosts to a plurality of routers based on optimization of one or more efficiency functions to generate a network on chip (NoC) interconnect.