发明名称 Analog to digital converter with low jitter sensitivity
摘要 An analog-to-digital converter includes an integrator to determine an integrated signal from a communication signal. A comparator quantizes the integrated signal to produce a quantized signal. An adjustable delay element provides a delayed quantized signal to the comparator.
申请公布号 US8878711(B1) 申请公布日期 2014.11.04
申请号 US201314015294 申请日期 2013.08.30
申请人 Broadcom Corporation 发明人 Loeda Pagliano Sebastian
分类号 H03M3/00 主分类号 H03M3/00
代理机构 Brinks Gilson & Lione 代理人 Brinks Gilson & Lione
主权项 1. A system, comprising: an input to receive a communication signal; an integrator connected with the input, the integrator to determine an integrated signal from the communication signal; a comparator, an output of the integrator connected with an input of the comparator, the comparator to quantize the integrated signal to produce a quantized signal; a digital-to-analog convertor connected between an output of the comparator and the output of the integrator and connected between the output of the comparator and an input of the integrator, the digital-to-analog convertor to convert the quantized signal to a delayed analog signal; and a compensation element connected with the digital-to-analog convertor, the compensation element to adjust a weight of the delayed analog signal, the comparator to receive the adjusted, delayed analog signal.
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