Stereoscopic image display capable of selectively implementing a two-dimensional plane image and a three-dimensional stereoscopic image

摘要

A stereoscopic image display includes a display panel, which selectively displays a 2D image and a 3D image and includes a plurality of pixels, and a patterned retarder for dividing light from the display panel into first polarized light and second polarized light. Each of the pixels includes a main display unit including a first pixel electrode and a first common electrode, a subsidiary display unit including a second pixel electrode and a second common electrode, and a line unit disposed between the main display unit and the subsidiary display unit. The line unit includes a gate line, a discharge control line through which a discharge control voltage is applied to a discharge control TFT, and a lower common line through which a common voltage is applied to an upper common line.

主权项

1. A stereoscopic image display comprising:
a display panel configured to selectively display a two-dimensional plane (2D) image and a three-dimensional plane (3D) image and including a plurality of pixels; and a patterned retarder configured to divide light from the display panel into first polarized light and second polarized light, wherein each of the plurality of pixels includes: a main display unit including a first pixel electrode connected to a data line through a first thin film transistor (TFT) and a first common electrode which is opposite to the first pixel electrode and is connected to an upper common line; a subsidiary display unit including a second pixel electrode, which is connected to the data line through a second TFT and is connected to the upper common line through a discharge control TFT, and a second common electrode which is opposite to the second pixel electrode and is connected to the upper common line; and a line unit disposed between the main display unit and the subsidiary display unit, the line unit including a gate line through which a scan pulse is commonly applied to the first TFT and the second TFT, a discharge control line through which a discharge control voltage is applied to the discharge control TFT, and a lower common line through which a common voltage is applied to the upper common line, wherein a first storage capacitor of the main display unit and a second storage capacitor of the subsidiary display unit are formed on the lower common line.