发明名称 BIAS CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a bias circuit that combines a high power supply voltage fluctuation rejection ratio and high-speed startability.SOLUTION: A bias circuit includes: a reference current generating unit having a first and a second reference current elements disposed in a first and a second current paths between a power terminal and a reference potential terminal; a first current mirror circuit for outputting a predetermined bias voltage from a first node connected to a control terminal of a first and a second transistors serially connected to the first and second reference current elements in the first and second current paths; a third transistor that is serially connected to a third reference current element in a third current path to configure a second current mirror circuit with the first or second transistor; a bypass capacitor connected between a second node connected to the control terminal of the third transistor and the power terminal; a start circuit for controlling the electrical potential of the first node to drive the first transistor; and a first switch that is connected between the first and second nodes and turns on when the electrical potential of the first node rises.
申请公布号 JP2014206825(A) 申请公布日期 2014.10.30
申请号 JP20130083262 申请日期 2013.04.11
申请人 FUJITSU LTD 发明人 NAKAMOTO HIROYUKI
分类号 G05F3/26;H03F3/345 主分类号 G05F3/26
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