APPARATUS AND METHOD TO PREVENT SIDE CHANNEL POWER ATTACKS IN ADVANCED ENCRYPTION STANDARD

摘要

Apparatus and method for obscuring round 1 power consumption of hardware implementation of the Advanced Encryption Standard (AES) algorithm. Additional hardware circuitry will provide consistent power consumption during round 1 of the AES algorithm. This prevents the opportunity to determine the AES key value during a side channel power attack.

主权项

1. In a hardware implementation of the Advanced Encryption Standard having a data hit and a key bit for each bit of an encryption key, an apparatus for preventing the determination of said encryption key, comprising:
an exclusive OR circuit having a first input, a second input, and an exclusive OR output; a flip flop circuit having a signal input, a clock input, and a latched output; and a capacitor having a first terminal and a second terminal; wherein
an inverted version of said key bit connected to said first input;said data hit is connected to said second input;said exclusive OR output is connected to said sigma input;said latched output is connected to said first terminal of said capacitor; andsaid second terminal of said capacitor is connected to ground.