SYSTEM AND METHOD FOR PER-BIT DE-SKEW FOR DATAMASK IN A DOUBLE DATA-RATE MEMORY DEVICE INTERFACE

摘要

In a training mode, per-bit de-skew (PBDS) values for a datamask signal in a synchronous dynamic random access memory are iteratively adjusted in conjunction with writing test patterns to the memory and reading back test patterns from the memory until optimum datamask PBDS values are determined.

主权项

1. A method for determining per-bit de-skew (PBDS) values for datamask (DM) signal lines in a dynamic random access memory (DRAM) interface, comprising:
(a) setting a PBDS value for a DM signal line of the interface; (b) sequentially providing a plurality of initial DM values to the DRAM memory using the DM signal line, each initial DM value of the plurality of initial DM values representing an unmasked state; (c) sequentially writing a plurality of first write data values to a corresponding plurality of DRAM locations in synchronism with step (b) using a data signal line group corresponding to the DM signal line, each initial DM value defining an unmasked DRAM location of the plurality of DRAM locations, the interface delaying signals representing the initial DM values on the DM signal line by an amount of time corresponding to the PBDS value; (d) sequentially providing a plurality of DM values to the DRAM memory using the DM signal line, at least one DM value of the plurality of DM values representing a masked state and at least another DM value of the plurality of DM values representing an unmasked state; (e) sequentially writing a plurality of second write data values different from the plurality of first write data values to a corresponding plurality of DRAM locations in synchronism with step (d) using the data signal line group corresponding to the DM signal line, each DM value representing a masked state defining a masked DRAM location of the plurality of DRAM locations, each DM value representing an unmasked state defining an unmasked DRAM location of the plurality of DRAM locations, the interface delaying signals representing the DM values on the DM signal line by an amount of time corresponding to the PBDS value; (f) reading a plurality of read data values from the plurality of DRAM locations following step (e); (g) determining if each read data value read from a masked DRAM location matches a first write data value written to the masked DRAM location and each read data value read from an unmasked DRAM location matches a second write data value written to the unmasked DRAM location; (h) setting the PBDS value for the DM signal line to another value; and (i) iteratively repeating steps (b)-(h) with the PBDS value for the DM signal line set to each of a plurality of different PBDS values within a range of PBDS values.