发明名称 Semiconductor memory device
摘要 In a semiconductor memory device, an update data control circuit is provided, which selectively couples a physical address input data line or an effective address input data line to a common input data line coupled to a physical address cell that stores a physical address page number. A control terminal of an update circuit of the physical address cell is coupled to a page size cell that stores page size information via an update control circuit, to control a write port of the physical address cell with the page size cell.
申请公布号 US8874869(B2) 申请公布日期 2014.10.28
申请号 US201213363585 申请日期 2012.02.01
申请人 Panasonic Corporation 发明人 Koike Tsuyoshi
分类号 G06F12/10;G11C15/04 主分类号 G06F12/10
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A semiconductor memory device comprising: a first memory circuit; a second memory circuit; a readout circuit configured to read out data stored in the first memory circuit to a first output data line based on the data in the first memory circuit and a first control signal; an update circuit configured to update the data in the first memory circuit to data on a first input data line using second input data from the second memory circuit; and an update data control circuit having a function of selectively outputting first update data or second update data to the first input data line.
地址 Osaka JP
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