Method for manufacturing a low defect interface between a dielectric and a III-V compound

摘要

The present invention is related to a method for manufacturing a low defect interface between a dielectric material and an III-V compound. More specifically, the present invention relates to a method for manufacturing a passivated interface between a dielectric material and an III-V compound. The present invention is also directed to a device comprising a low defect interface between a dielectric material and an III-V compound that has improved performance.

主权项

1. An electronic device having a passivated interface between a dielectric material and a III-V compound, wherein the device comprises:
a substrate comprising an exposed region comprising a first III-V compound; and thereupon a first intermediate layer overlying and in contact with the exposed region; a second intermediate layer overlying and in contact with the first intermediate layer; a third intermediate layer overlying and in contact with the second intermediate layer; a fourth intermediate layer overlying and in contact with the third intermediate layer, wherein the first and the third intermediate layer comprise a third III-V compound selected to have a large band gap, and wherein the second and the fourth intermediate layer comprise a second III-V compound selected to have a narrow band gap; a dielectric layer overlying the fourth intermediate layer; and at the interface between the second III-V compound and the dielectric, a chalcogenides passivation layer consisting essentially of chalcogenides atom-Group III atom bonds.