发明名称 |
Semiconductor device and method for low resistive thin film resistor interconnect |
摘要 |
The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction. |
申请公布号 |
US8871603(B2) |
申请公布日期 |
2014.10.28 |
申请号 |
US201213463290 |
申请日期 |
2012.05.03 |
申请人 |
Texas Instruments Deutschland GmbH;Texas Instruments Incorporated |
发明人 |
Dirnecker Christoph Andreas Othmar;Olsen Leif Christian |
分类号 |
H01L29/76;H01L29/94;H01L21/768;H01L23/522;H01L49/02;H01L27/01 |
主分类号 |
H01L29/76 |
代理机构 |
|
代理人 |
Garner Jacqueline J.;Telecky Jr. Frederick J. |
主权项 |
1. A method of manufacturing an electronic device, the method comprising:
depositing a first conductive layer; depositing a first intermetal dielectric layer on top of the first conductive layer; depositing a resistive layer and structuring the resistive layer for a thin film resistor; depositing a second intermetal dielectric layer on top of the resistive layer; etching a first VIA opening into the second intermetal dielectric and the first intermetal dielectric layer down to the first conductive layer; etching a second opening into the second intermetal dielectric and the first intermetal dielectric layer down to the first conductive layer, wherein a horizontal cross-sectional plane of the second opening partially overlaps the resistive layer of the thin film resistor in a first dimension and wherein the first VIA opening does not overlap the resistive layer, depositing a conductive material in the second opening so as to electrically couple the resistive layer of the thin film resistor and the first conductive layer, depositing a second conductive layer on top of the second dielectric layer, and electrically connecting the second conductive layer with the conductive material in the second opening. |
地址 |
Freising DE |