| 摘要 |
PROBLEM TO BE SOLVED: To backup memory contents of a volatile memory in a non-volatile memory while suppressing a reduction in processing speed.SOLUTION: A control unit 50 includes a CPU 51, DRAM 52, memory controller 53 for DRAM, cache 54 for DRAM, MRAM 55, memory controller 56 for MRAM, cache (cache memory) 57 for MRAM, and internal bus 58 interconnecting these components. The control unit 50 controls to hold cache coherency (consistency) between the DRAM 52 and cache 54 for DRAM, hold cache coherency between the MRAM 55 and cache 57 for MRAM, and hold coherency between the cache 54 for DRAM and cache 57 for MRAM. |
