发明名称 PROCESSING APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM
摘要 A processing apparatus includes a first memory, a second memory, a capacitor, and a processor coupled to the first memory and the second memory. The processor is configured to cause power feeding from the capacitor, and execute a first processing to cause the first memory to hold data, after the power feeding is caused from the capacitor, cause a battery to start power feeding in at least one of a case where the power feeding from an external power source is not started after being halted and an output voltage of the capacitor has fallen below a first value, and a case where the power feeding from the external power source is not started after being halted and a first time period has elapsed, and execute a second processing to write the data from the first memory into the second memory during the power feeding from the battery.
申请公布号 US2014317436(A1) 申请公布日期 2014.10.23
申请号 US201414249586 申请日期 2014.04.10
申请人 FUJITSU LIMITED 发明人 YUASA Kentarou;Ishii Takanori
分类号 G06F11/14 主分类号 G06F11/14
代理机构 代理人
主权项 1. A processing apparatus comprising: a first memory; a second memory; a capacitor; and a processor coupled to the first memory and the second memory and configured to when power feeding from an external power source to the processing apparatus is halted, cause power feeding from the capacitor to the first memory, and execute a first processing to cause the first memory to hold data, after the power feeding is caused from the capacitor, cause a battery to start power feeding to the second memory in at least one of a case where the power feeding from the external power source is not started after being halted and an output voltage of the capacitor has fallen below a first value after execution of the first processing, anda case where the power feeding from the external power source is not started after being halted and a first time period has elapsed after execution of the first processing, and execute a second processing to write the data from the first memory into the second memory during the power feeding from the battery.
地址 Kawasaki-shi JP