发明名称 Simulation execution method, program and system
摘要 <p>[Object] To provide a technique for increasing the speed of parallel running of logical processes without sacrificing the accuracy of data update timing in a parallel discrete event simulation system. [Solution] A logical process involving a longer receiving time lag that that of sending is executed by an amount of initial shift for a predetermined period before the start of the entire simulation. It is preferred to set the initial shift to be one-half of a value of difference between the receiving time lag and the sending time lag. The logical process executed with timing displaced by the amount of initial shift for the predetermined period runs by exchanging null messages with each other. Each null message is delivered to a correspondent logical process after the predetermined time lag, and each logical process further sends the correspondent logical process a null message upon receipt of the null message. Thus, there is a progression of simulation by synchronizing them through the null messages.</p>
申请公布号 GB2508769(B) 申请公布日期 2014.10.22
申请号 GB20140005177 申请日期 2012.11.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MASANA MURASE;GANG ZHANG;SHUICHI SHIMIZU
分类号 G06F11/26 主分类号 G06F11/26
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