发明名称 Method for manufacturing a non-volatile semiconductor memory device having contact plug formed on silicided source/drain region
摘要 A method for manufacturing a semiconductor device includes the steps of forming a flash memory cell provided with a floating gate, an intermediate insulating film, and a control gate, forming first and second impurity diffusion regions, thermally oxidizing surfaces of a silicon substrate and the floating gate, etching a tunnel insulating film in a partial region through a window of a resist pattern; forming a metal silicide layer on the first impurity diffusion region in the partial region, forming an interlayer insulating film covering the flash memory cell, and forming, in a first hole of the interlayer insulating film, a conductive plug connected to the metal silicide layer.
申请公布号 US8865546(B2) 申请公布日期 2014.10.21
申请号 US201213616806 申请日期 2012.09.14
申请人 Fujitsu Semiconductor Limited 发明人 Yamada Tetsuya
分类号 H01L21/336;H01L29/66;H01L21/311;H01L27/115;H01L29/788;H01L21/316;H01L21/285;H01L27/105;G11C16/04;H01L27/02 主分类号 H01L21/336
代理机构 Westerman, Hattori, Daniels & Adrian, LLP 代理人 Westerman, Hattori, Daniels & Adrian, LLP
主权项 1. A method for manufacturing a semiconductor device, comprising: forming a tunnel insulation film on a semiconductor substrate; forming a first conductive film on the tunnel insulation film; forming an intermediate insulating film on the first conductive film; forming a second conductive film over the intermediate insulating film; patterning the first conductive film, the intermediate insulating film and the second conductive film to form a floating gate and control gate of a flash memory cell in a first region and to form a first gate electrode of a MOS transistor on a part of the tunnel insulation film in a second region; forming a first impurity diffusion region and a second impurity diffusion region, that is located between the flash memory cell and the first gate electrode in a plan view, as source/drain regions of the flash memory cell in the first region; thermally oxidizing surfaces of each of the semiconductor substrate and the floating gate after forming the first impurity diffusion region and the second impurity diffusion region, a thickness of the tunnel insulation film in the first region being larger than a thickness of the tunnel insulation film in the second region after thermally oxidizing; removing the tunnel insulation film located on a partial region of the first impurity diffusion region after thermally oxidizing; forming a first metal silicide layer on the partial region of the first impurity diffusion region; forming an interlayer insulating film covering the flash memory cell and the MOS transistor; forming a first hole in the interlayer insulating film over the partial region; and forming a conductive plug connected to the first metal silicide layer in the first hole.
地址 Yokohama JP