发明名称 SEMICONDUCTOR MEMORY DEVICE REDUCING THE NUMBER OF INPUT TEST BIT AND TEST DATA WRITING METHOD THEREFOR
摘要 <p>Disclosed are a semiconductor memory device for reducing the number of input test bits, and a test data writing method therefor. The semiconductor memory device according to the present invention comprises: a memory block including a plurality of memory cells that is arranged in a matrix structure consisting of rows and columns; a test data providing block providing the memory block with a test data group including a plurality of test data bits, wherein the test data bits have data values corresponding to a plurality of seed data bits of a seed data group according to activation of a compression enable signal; and a pass determination block configured to read a read data group from the memory block and determine normal writing of the test data group. In the semiconductor memory device and the test data writing method therefor according to the present invention, writing and test of data for a plurality of bits can be processed by one test bit. Therefore, by the semiconductor memory device and the test data writing method therefor according to the present invention, test efficiency can be improved.</p>
申请公布号 KR20140121977(A) 申请公布日期 2014.10.17
申请号 KR20130038365 申请日期 2013.04.09
申请人 FIDELIX CO., LTD.;NEMOSTECH CO., LTD. 发明人 KIM, YONG UN
分类号 G11C29/10 主分类号 G11C29/10
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