发明名称 ANALOG/DIGITAL CONVERTER AND METHOD FOR CONVERTING ANALOG SIGNALS TO DIGITAL SIGNALS
摘要 The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing. An A/D converter (1) of the invention, which is a cyclic type of analog/digital converter for converting an analog input signal to a digital signal having a predetermined resolution, comprises: a digital approximation unit (10) that includes a comparing unit (13) for comparing the magnitude of an input first analog signal with a threshold value to output a digital value indicating a result of the comparison and that also includes an MDAC unit (14) for amplifying the first analog signal to β-fold, where β is greater than one but smaller than two, and for executing a predetermined computation in accordance with the result of the comparison of the comparing unit to output a second analog signal; a multiplexer (20) that, if the MSB is to be computed, outputs the analog input signal and, otherwise, outputs the second analog signal as the first analog signal; a β estimating unit (30) that estimates the value of β; and a digital signal outputting unit (40) that sequentially takes in digital values outputted by the comparing unit and that outputs the taken-in digital values as the digital signal.
申请公布号 US2014300500(A1) 申请公布日期 2014.10.09
申请号 US201214346260 申请日期 2012.09.06
申请人 San Hao;Maruyama Tsubasa;Hotta Masao 发明人 San Hao;Maruyama Tsubasa;Hotta Masao
分类号 H03M1/14;H03M1/12 主分类号 H03M1/14
代理机构 代理人
主权项 1. A cyclic-type analog-digital converter for converting an analog input signal that is input into a digital signal having a predetermined resolution, the analog-digital converter comprising: a digital approximator including a comparator configured to compare the magnitude of a first analog signal that is input and a threshold value and to output a digital value indicative of the comparison result and a multiplying digital-analog converter configured to amplify the first analog signal by a factor of β and at the same time, to perform a predetermined calculation in accordance with the comparison result of the comparator to output a second analog signal; a multiplexer configured to output an analog input signal as the first analog signal when calculating the most significant bit and to output the second analog signal as the first analog signal when calculating a bit other than the most significant bit; a β estimator configured to estimate the value of β; and a digital signal output unit configured to sequentially take in the digital value output from the comparator and to output the digital value as a digital signal based on an estimated value of β, wherein the value of β is a value larger than 1 and smaller than 2.
地址 Tokyo JP
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