发明名称 Methods, systems, and apparatus for reliability synthesis
摘要 In one embodiment of the invention, a method of synthesizing a circuit design is disclosed including receiving an input model of an initial circuit design into an electronic design automation system; receiving a user specification detailing a reliability feature to add to the initial circuit design; adding the reliability feature to the input model based upon the user specification to generate a modified input model; and producing an output model of a circuit design with the reliability feature in response to the modified input model.
申请公布号 US8856700(B1) 申请公布日期 2014.10.07
申请号 US200812047540 申请日期 2008.03.13
申请人 Cadence Design Systems, Inc. 发明人 Watanabe Yosinori;Ghijsen Walter J.;Meyer Michael J.;McNamara Michael T. Y.;Campenhout David Van
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Alford Law Group, Inc. 代理人 Alford Law Group, Inc.
主权项 1. A method of synthesizing a circuit design comprising: receiving a high level description of a circuit design into an electronic design automation system; receiving a user specification into the electronic design automation system, the user specification selecting a reliability circuit feature to add to the circuit design; adding the reliability circuit feature to the high level description of the circuit design based upon the user specification to generate a modified high level description of the circuit design; and producing a netlist of the circuit design with the reliability circuit feature in response to the modified high level description of the circuit design.
地址 San Jose CA US