| 发明名称 | Shielded pattern generation for a circuit design board | ||
| 摘要 | A circuit board design aid is achieved by generating a shield pattern for a wiring pattern including a pattern element in a circuit board by increasing a width of a geometry of the pattern element by an amount corresponding to a shield pattern spacing set as a preset pattern generation condition. A prohibition region is generated based on a geometry of an element for which a clearance check is to be performed located around the wiring pattern and a clearance condition between the element for performing a clearance check and the wiring pattern. Then, the shield pattern is generated by excluding the geometry of the prohibition region from the geometry of the basic shield pattern element. | ||
| 申请公布号 | US8856717(B2) | 申请公布日期 | 2014.10.07 |
| 申请号 | US201012883445 | 申请日期 | 2010.09.16 |
| 申请人 | Fujitsu Limited | 发明人 | Kumagai Kazunori;Konno Eiichi |
| 分类号 | G06F17/50;H05K3/00;H05K1/02 | 主分类号 | G06F17/50 |
| 代理机构 | Staas & Halsey LLP | 代理人 | Staas & Halsey LLP |
| 主权项 | 1. A circuit board design aid apparatus that includes a processor and that generates a shield pattern for a wiring pattern including a pattern element in a circuit board, the processor executing instructions comprising: generating a basic shield pattern element by increasing a width of a geometry of the pattern element by an amount equal to or more than a shield pattern spacing set as a preset pattern generation condition; generating a prohibition region based on a geometry of an element for which a clearance check is performed located around the wiring pattern and a clearance condition between the element for performing a clearance check and the wiring pattern; and generating the shield pattern by excluding the geometry of the prohibition region from a geometry of the basic shield pattern element. | ||
| 地址 | Kawasaki JP | ||