| 摘要 |
<p>PROBLEM TO BE SOLVED: To improve reliability in a wiring board having a multilayer capacitor buried therein.SOLUTION: Provided is a multilayer wiring board 1 having a chip mount region in which an IC chip 2 is mounted on a face P1 and having a multilayer capacitor buried therein. In the multilayer wiring board 1, in which a region in the circumference of the chip mount region of and located directly below the periphery of the circumference is a circumferential region ER, the multilayer capacitor 5 buried in the circumferential region ER is disposed so that a layered direction SD2 of a plurality of internal electrode layers 72 constituting this multilayer capacitor 5 is perpendicular to a face P1, and at least one instance of the multilayer capacitor 5 buried in a region other than the circumferential region ER is disposed so that the layered direction SD2 of a plurality of internal electrode layers 72 constituting this multilayer capacitor 5 is parallel to the face P1.</p> |
