发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having high withstand voltage, low on-resistance and high avalanche withstanding capabilities.SOLUTION: A semiconductor device manufacturing method according to a present embodiment comprises: a process of forming a plurality of second conductivity type first impurity implantation layers 4a; a process of forming a first conductivity type first epitaxial layer 5; a process of forming a plurality of second conductivity type second impurity implantation layers 4a; a process of forming a first conductivity type second epitaxial layer 6 having a thickness thinner than that of the first epitaxial layer; a process of performing a heat treatment to bond the second conductivity type first impurity implantation layer and the second conductivity type second impurity implantation layer to form a plurality of second conductivity type pillar layers 4c; and forming on a surface of the second epitaxial layer 6, a second conductivity type second semiconductor layer 8 which contacts the second conductivity type pillar layer 4c.</p>
申请公布号 JP2014187200(A) 申请公布日期 2014.10.02
申请号 JP20130061136 申请日期 2013.03.22
申请人 TOSHIBA CORP 发明人 FUKUDA TATSUO
分类号 H01L29/78;H01L21/336;H01L29/06 主分类号 H01L29/78
代理机构 代理人
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