发明名称 LOW LEAKAGE, LOW THRESHOLD VOLTAGE, SPLIT-GATE FLASH CELL OPERATION
摘要 A method of reading a memory device having rows and columns of memory cells formed on a substrate, where each memory cell includes spaced apart first (16) and second (14) regions with a channel region (18) therebetween, a floating gate (22) disposed over a first portion of the channel region, a select gate (20) disposed over a second portion of the channel region, a control gate (26) disposed over the floating gate, and an erase gate (24) disposed over the first region. The method includes placing a small positive voltage on the unselected source lines (16), and/or a small negative voltage on the unselected word lines (20) during the read operation to suppress subthreshold leakage and thereby improve read performance.
申请公布号 WO2014158677(A1) 申请公布日期 2014.10.02
申请号 WO2014US19230 申请日期 2014.02.28
申请人 SILICON STORAGE TECHNOLOGY, INC. 发明人 DO, NHAN;LEMKE, STEVEN, MALCOLM;KIM, JINHO;YOO, JONG-WON;KOTOV, ALEXANDER;TKACHEV, YURI
分类号 G11C16/04;G11C16/26;H01L27/115 主分类号 G11C16/04
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