发明名称 RECEPTION CIRCUIT AND COMMUNICATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable a stress test.SOLUTION: A reception circuit comprises: an interpolation circuit 12 for generating output data on the basis of an interpolation code from input data which includes a data point and boundary point and is input in time series; a detection circuit 16 for outputting a detection signal when detecting a phase of the output data on the basis of a boundary point in the output data; a low-pass filter 18 for filtering the detection signal to generate the interpolation code; and a modulation circuit 20 which modulates the interpolation code generated by the low-pass filter on the basis of a modulation signal having a frequency differing from a cut-off frequency of the low-pass filter and outputs the modulated code to the interpolation circuit.
申请公布号 JP2014187652(A) 申请公布日期 2014.10.02
申请号 JP20130062723 申请日期 2013.03.25
申请人 FUJITSU LTD 发明人 DOI YOSHIYASU
分类号 H04L7/02;H03L7/08;H03L7/093;H04L7/04;H04L25/02 主分类号 H04L7/02
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