REDUCTION OF INRUSH CURRENT DUE TO VOLTAGE SAGS

摘要

A current limiting circuit (400) times the removal of a current limiting impedance between an input power voltage (100) and a load (233). The current limiting circuit (400) comprise a parallel arrangement of (a) a selectively actuatable relay (229) and (b) a semiconductor switch (226) in series with a resistance (R T ) coupled between the input power voltage (100) and the load (233); a sag detector (213) providing a signal (223) once it detects a voltage sag (106) in the input power voltage (100); an impedance removal timing circuit (403) comparing a load voltage with the input power voltage (100) and providing an impedance removal signal (406); a gate drive (216) coupled to receive the signal (223) from the sag detector (213) and the impedance removal timing signal (406) and controlling the actuation of the relay (229) and the semiconductor switch (226). The impedance removal timing circuit (403) sends the impedance removal signal (406) to the gate drive (216) that causes the gate drive (216) to remove the impedance from the load (233), when conditions occur that will allow the load (233) to be supplied with the line voltage without causing an undesirable inrush current surge.